Publications

Conferences.

[PLDI] PyLSE: A pulse-transfer language for superconductor electronics. M. Christensen, G. Tzimpragos, H. Kringen, J. Volk, T. Sherwood, B. Hardekopf. Proceedings of 43rd Conference on Programming Language Design and Implementation. San Diego, CA. June 2022. [Artifact] [GitHub]

[ISCA] Superconducting computing with alternating logic elements. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. Proceedings of 48th International Symposium on Computer Architecture. Valencia, Spain. June 2021. [Slides] [GitHub] (Invited Oral Presentation at EUCAS) (IEEE Micro Top Picks Honorable Mention)

[CCGrid] TiAcc: Triangle inequality-based hardware accelerator for k-means on FPGAs. Y. Wand, B. Feng, G. Li, G. Tzimpragos, L. Deng, Y. Xie, Y. Ding. Proceedings of 21st International Symposium on Cluster, Cloud and Internet Computing. Melbourne, Australia. May 2021. [Video]

[ASPLOS] A computational temporal logic for superconducting accelerators. G. Tzimpragos, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Volk, J. Shalf, T. Sherwood. Proceedings of 25th International Conference on Architectural Support for Programming Languages and Operating Systems. Lausanne, Switzerland. March 2020. [Slides] [Video] [GitHub] [Chip photo] (IEEE Micro Top Picks)

[ASPLOS] Boosted race trees for low-energy classification. G. Tzimpragos, A. Madhavan, D. Vasudevan, D. Strukov, T. Sherwood. Proceedings of 24th International Conference on Architectural Support for Programming Languages and Operating Systems. Providence, RI. April 2019. [Slides] [GitHub] (Best Paper Award) (CACM Research Highlights)

[ISCA] Charm: A language for closed-form high-level architecture modeling. W. Cui, Y. Ding, D. Dangwal, A. Holmes, J. McMahan, A. Javadi-Abhari, G. Tzimpragos, F. T. Chong, T. Sherwood. Proceedings of 45th International Symposium on Computer Architecture. Los Angeles, CA. July 2018. [GitHub]

[FPL] A Pythonic approach for rapid hardware prototyping and instrumentation. J. Clow, G. Tzimpragos, D. Dangwal, S. Guo, J. McMahan, T. Sherwood. Proceedings of 27th International Conference on Field programmable Logic and Applications. Ghent, Belgium. October 2017. [Slides] [GitHub]

[FPT] Application debug in FPGAs in the presence of multiple asynchronous clocks. G. Tzimpragos, D. Cheng, S. Tapp, B. Jayadev, A. Majumdar. Proceedings of International Conference on Field Programmable Technology. Xi’an, China. May 2016.

[OI] Flexible-bandwidth power-aware optical interconnects with source-synchronous techniques. R. Proietti, C. J. Nitta, Z. Cao, M. Clements, G. Tzimpragos, S. J. B. Yoo. Proceedings of IEEE Optical Interconnects Conference. San Diego, CA. June 2015.

[ICOCN] Reconfigurable FEC codes for software-defined optical transceivers. C. Kachris, G. Tzimpragos, D. Soudris, I. Tomkos. Proceedings of 13th International Conference on Optical Communications and Networks. Suzhou, China. December 2014.

[FPL] A low-complexity implementation of QC-LDPC encoder in reconfigurable logic. G. Tzimpragos, C. Kachris, D. Soudris, I. Tomkos. Proceedings of 23rd International Conference on Field programmable Logic and Applications. Porto, Portugal. October 2013.

Journals.

[CACM] In-sensor classification with boosted race trees. G. Tzimpragos, A. Madhavan, D. Vasudevan, D. Strukov, T. Sherwood. Communications of ACM. June 2021. [Technical Perspective] [GitHub]

[IEEE Micro] Temporal computing with superconductor electronics. G. Tzimpragos, J. Volk, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Shalf, T. Sherwood. IEEE Micro: Micro's Top Picks from Computer Architecture Conferences. May-June 2021. [GitHub] [Chip photo]

[IEEE Micro] Agile hardware development and instrumentation with PyRTL. D. Dangwal, G. Tzimpragos, T. Sherwood. IEEE Micro, Volume 40, Issue 4. July-August 2020. [GitHub]

[ACM JETC] Language support for navigating architecture design in closed form. W. Cui, G. Tzimpragos, Y. Tao J. McMahan, D. Dangwal, N. Tsiskaridze, G. Michelogiannakis, D. Vasudevan, T. Sherwood. ACM Journal on Emerging Technologies in Computing Systems. February 2019. [GitHub]

[IEEE COMST] A survey on FEC codes for 100G and beyond optical networks. G. Tzimpragos, C. Kachris, I. B. Djordjevic, M. Cvijetic, D. Soudris, I. Tomkos. IEEE Communications Surveys & Tutorials. First quarter 2016.

Preprints.

[arXiv] Low-cost superconducting fan-out with repurposed Josephson junctions. J. Volk, G. Tzimpragos, A. Wynn, E. Golden, T. Sherwood. 2022. (Best Student Paper Runner-Up at ASC)

[arXiv] Pulsar: A superconducting delay-line memory. G. Tzimpragos, J. Volk, A. Wynn, E. Golden, T. Sherwood. 2022.

Patents.

Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit. A. Majumdar, G. Tzimpragos, J. Villarreal, K. Deepak, J. Rangarajan. 10754759. August 2020. (Xilinx SDAccel's and Vitis' hardware debugging utility)

Data unit breakpointing circuits and methods. G. Tzimpragos, J. Villarreal, A. Majumdar, K. Deepak, Y. Zhu. 10621067. April 2020. (Xilinx SDAccel's and Vitis' hardware debugging utility)

Invited.

[EUCAS] Superconducting logic design with clockless xSFQ Gates. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. 15th European Conference in Applied Superconductivity. Moscow, Russia. September 2021.

[ICTON] Flexible FEC codes for next-generation software-defined optical transceivers. C. Kachris, G. Tzimpragos, G. Borriello, P. Zakynthinos, I. Tomkos. Proceedings of 16th International Conference on Transparent Optical Networks. Graz, Austria. August 2014.

Workshops.

[ISCAW] From arbitrary functions to space-time implementations. G. Tzimpragos, N. Tsiskaridze, K. Huch, A. Madhavan, T. Sherwood. 1st Workshop on Unary Computing held in conjunction with ISCA. Phoenix, AZ. June 2019.

[ISCAW] A truth-matrix view into unary computing. A. Madhavan, G. Tzimpragos, M. Stiles, T. Sherwood. 1st Workshop on Unary Computing held in conjunction with ISCA. Phoenix, AZ. June 2019.

[IPDPSW] A low-latency algorithm and FPGA design for the min-search of LDPC decoders. G. Tzimpragos, C. Kachris, D. Soudris, I. Tomkos. 21st Reconfigurable Architectures Workshop held in conjunction with IPDPS, AZ. May 2014.

[PATMOS] Automatic implementation of low-complexity QC-LDPC encoders. G. Tzimpragos, C. Kachris, D. Soudris, I. Tomkos. 23rd Workshop on Power and Timing Modeling, Optimization, and Simulation. Karlsruhe, Germany. September 2013.