Publications

Conferences.

[ISCA] Superconducting Computing with Alternating Logic Elements. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. Proceedings of 48th International Symposium on Computer Architecture, Valencia, Spain, June 2021. [slides] [GitHub] (Invited Oral Presentation at EUCAS)

[CCGrid] TiAcc: Triangle Inequality-based Hardware Accelerator for K-means on FPGAs. Y. Wand, B. Feng, G. Li, G. Tzimpragos, L. Deng, Y. Xie, Y. Ding. Proceedings of 21st International Symposium on Cluster, Cloud and Internet Computing, Melbourne, Australia, May 2021. [video]

[ASPLOS] A Computational Temporal Logic for Superconducting Accelerators. G. Tzimpragos, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Volk, J. Shalf, T. Sherwood. Proceedings of 25th International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, March 2020. [slides] [video] [GitHub] [chip photo] (IEEE Micro Top Picks)

[ASPLOS] Boosted Race Trees for Low Energy Classification. G. Tzimpragos, A. Madhavan, D. Vasudevan, D. Strukov, T. Sherwood. Proceedings of 24th International Conference on Architectural Support for Programming Languages and Operating Systems, Providence, RI, April 2019. [slides] [GitHub] (Best Paper Award) (CACM Research Highlights)

[ISCA] Charm: A language for closed-form high-level architecture modeling. W. Cui, Y. Ding, D. Dangwal, A. Holmes, J. McMahan, A. Javadi-Abhari, G. Tzimpragos, F. T. Chong, T. Sherwood. Proceedings of 45th International Symposium on Computer Architecture, Los Angeles, CA, July 2018. [GitHub]

[FPL] A Pythonic Approach for Rapid Hardware Prototyping and Instrumentation. J. Clow, G. Tzimpragos, D. Dangwal, S. Guo, J. McMahan, T. Sherwood. Proceedings of 27th International Conference on Field programmable Logic and Applications, Ghent, Oct. 2017. [slides] [GitHub]

[FPT] Application Debug in FPGAs in the Presence of Multiple Asynchronous Clocks. G. Tzimpragos, D. Cheng, S. Tapp, B. Jayadev, A. Majumdar. Proceedings of International Conference on Field Programmable Technology, Xi’an, May 2016.

[OI] Flexible-bandwidth power-aware optical interconnects with source synchronous technique. R. Proietti, C. J. Nitta, Z. Cao, M. Clements, G. Tzimpragos, S. J. B. Yoo. Proceedings of IEEE Optical Interconnects Conference, San Diego, CA, June 2015.

[ICOCN] Reconfigurable FEC codes for software-defined optical transceivers. C. Kachris, G. Tzimpragos, D. Soudris, I. Tomkos. Proceedings of 13th International Conference on Optical Communications and Networks, Suzhou, Dec. 2014.

[ICTON] Flexible FEC codes for next-generation software-defined optical transceivers. C. Kachris, G. Tzimpragos, G. Borriello, P. Zakynthinos, I. Tomkos. Proceedings of 16th International Conference on Transparent Optical Networks, Graz, Aug. 2014. (invited paper)

[FPL] A low-complexity implementation of QC-LDPC encoder in reconfigurable logic. G. Tzimpragos, C. Kachris, D. Soudris, I. Tomkos. Proceedings of 23rd International Conference on Field programmable Logic and Applications, Porto, Oct. 2013.

Journals.

[CACM] In-sensor Classification with Boosted Race Trees. G. Tzimpragos, A. Madhavan, D. Vasudevan, D. Strukov, T. Sherwood. Communications of ACM, June 2021. [Technical Perspective] [GitHub]

[IEEE Micro] Temporal Computing with Superconductor Electronics. G. Tzimpragos, J. Volk, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Shalf, T. Sherwood. IEEE Micro: Micro's Top Picks from Computer Architecture Conferences, May-June 2021. [GitHub] [chip photo]

[IEEE Micro] Agile Hardware Development and Instrumentation with PyRTL. D. Dangwal, G. Tzimpragos, T. Sherwood. IEEE Micro, Volume 40, Issue 4, July-Aug. 2020. [GitHub]

[ACM JETC] Language Support for Navigating Architecture Design in Closed Form. W. Cui, G. Tzimpragos, Y. Tao J. McMahan, D. Dangwal, N. Tsiskaridze, G. Michelogiannakis, D. Vasudevan, T. Sherwood. ACM Journal on Emerging Technologies in Computing Systems, Feb. 2019. [GitHub]

[IEEE COMST] A Survey on FEC Codes for 100 G and Beyond Optical Networks. G. Tzimpragos, C. Kachris, I. B. Djordjevic, M. Cvijetic, D. Soudris, I. Tomkos. IEEE Communications Surveys & Tutorials, First quarter 2016.

Abstracts.

[EUCAS] Superconducting Logic Design with Clockless xSFQ Gates. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. 15th European Conference in Applied Superconductivity, Moscow, Sept. 2021. (invited oral presentation)

[EUCAS] Design of a Weighted-Input SFQ Threshold Gate. J. Volk, G. Tzimpragos, A. Wynn, T. Sherwood. 15th European Conference in Applied Superconductivity, Moscow, Sept. 2021. (oral presentation)

Patents.

Circuits and methods for superconducting computing with alternating logic elements. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. (pending)

Computational Temporal Logic for Superconducting Accelerators. G. Tzimpragos, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Volk, J. Shalf, T. Sherwood. (pending)

Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit. A. Majumdar, G. Tzimpragos, J. Villarreal, K. Deepak, J. Rangarajan. 10754759, Aug. 2020. (Xilinx SDAccel's and Vitis' main hardware debugging utility)

Data unit breakpointing circuits and methods. G. Tzimpragos, J. Villarreal, A. Majumdar, K. Deepak, Y. Zhu. 10621067, Apr. 2020. (Xilinx SDAccel's and Vitis' main hardware debugging utility)